The general structures and manufacturing processes for electronic packages are described in, for example, Donald P. Seraphim, Ronald Lasky, and Che-Yo Li, Principles of Electronic Packaging, McGraw-Hill Book Company, New York, N.Y., (1988), and Rao R. Tummala and Eugene J. Rymaszewski, Microelectronic Packacing Handbook, Van Nostrand Reinhold, New York, N.Y. (1988), both of which are hereby incorporated herein by reference.
As described by Seraphim et al., and Tummala et al., an electronic circuit contains many individual electronic circuit components, e.g., thousands or even millions of individual resistors, capacitors, inductors, diodes, and transistors. These individual circuit components are interconnected to form the circuits, and the individual circuits are further interconnected to form functional units. Power and signal distribution are done through these interconnections. The individual functional units require mechanical support and structural protection. The electrical circuits require electrical energy to function, and the removal of thermal energy to remain functional. Microelectronic packages, such as, chips, modules, circuit cards, circuit boards, and combinations thereof, are used to protect, house, cool, and interconnect circuit components and circuits.
Within a single integrated circuit, circuit component to circuit component and circuit to circuit interconnection, heat dissipation, and mechanical protection are provided by an integrated circuit chip. This chip is referred to as the "zeroth" level of packaging, while the chip enclosed within its module is referred to as the first level of packaging.
There is at least one further level of packaging. The second level of packaging is the circuit card. A circuit card performs at least four functions. First, the circuit card is employed because the total required circuit or bit count to perform a desired function exceeds the bit count of the first level package, i.e., the chip. Second, the circuit card provides for signal interconnection with other circuit elements. Third, the second level package, i.e., the circuit card, provides a site for components that are not readily integrated into the first level package, i.e., the chip or module. These components include, e.g., capacitors, precision resistors, inductors, electromechanical switches, optical couplers, and the like. Fourth, the second level package provides for thermal management, i.e., heat dissipation.
Packages may be characterized by the material used as the dielectric, i.e., as ceramic packages or as polymeric packages. One type of polymeric package is a metal core package, having a metal core, for example a copper core, a molybdenum core, or a Copper-Invar-Copper core, encapsulated in a polymeric dielectric material.
"Invar" is a registered trademark of Imphy S. A., 168 Rue De Rivoli, Paris, France for an "alloy which is substantially inexpansible," Registration No. 0063970. Invar is an iron-nickel alloy containing approximately sixty four weight percent iron and thirty six weight percent nickel.
Metal core printed circuit boards are described by Nandakumar G. Aakalu and Frank J. Bolda in "Coated-Metal Packaging", in Rao R. Tummala and Eugene J. Rymaszewski, Microelectronic Packaging Handbook, Van Nostrand Reinhold, New York, N.Y. (1988), at pages 923 to 953, specifically incorporated herein by reference.
As used herein, coated metal packages, also referred to as metal core packages, are polymer encapsulated conductive metal cores. Circuitization, that is, personalization, is carried out on the surface of the polymeric encapsulant, with vias and through holes passing through the polymeric encapsulant and the metal core.
The metal core may be a copper core, a molybdenum core, or a Copper-Invar-Copper core. Copper and Copper-Invar-Copper cores spread out the heat from the devices mounted on the card or board. The high thermal conductivity allows the devices, for example the memory devices or logic devices, to operate at lower temperatures. The metal core also provides high mechanical strength and rigidity to the package. The metal core allows the substrate to carry large and heavy components, and to function in environments where shock, vibration, heat, and survivability are a factor.
Copper-Invar-Copper is a particularly desirable core material because of its thermal, electrical, and mechanical properties. Invar is an iron-nickel alloy containing approximately sixty four weight percent iron and thirty six weight percent nickel. While deviations from this composition are possible, the 64-36 alloy has the lowest coefficient of thermal expansion in the iron-nickel binary system, approximately 1.5.times.10.sup.-7 /degree Centigrade.
Lamination of the Invar between copper films of controlled thickness determines the properties of the Copper-Invar-Copper core. This is shown in Table 1, below, adapted from Nandakumar G. Aakalu and Frank J. Bolda in "Coated-Metal Packaging", in Rao R. Tummala and Eugene J. Rymaszewski, Microelectronic Packacing Handbook, Van Nostrand Reinhold, New York, N.Y. (1988), Table 13-2, at page 932.
TABLE 1 ______________________________________ Properties of Copper-Invar-Copper ______________________________________ Property Cu/In/Cu Cu/In/Cu % Cu/% Invar/% Cu 12.5/75/12.5 20/60/20 Coefficient of thermal 44 53 expansion (.times.10.sup.-7 /deg C.) Electrical Resistivity 7.0 4.3 (micro-ohm-cm) Young's Modulus 1.4 1.35 (10.sup.5 mPa) Enlongation (%) 2.0 2.5 Tensile Strength 380-480 310-410 (mPa) Density 8.33 8.43 (grams/cm.sup.3) Thermal Conductivity (10.sup.-7 /degree Centigrade) x-y plane 107 160 z plane 14 18 Thermal Diffusivity 0.249 0.432 (cm.sup.2 /second) Specific Heat 0.484 0.459 (Watts/gm deg C.) Yield Strength 240-340 170-270 ______________________________________
The encapsulating polymer may be a fluorocarbon, a phenolic, an epoxy, a xylylene, a benzocyclobutene, or a polyimide.
Two critical problems in metal core packages are the adhesion of the polymeric dielectric encapsulant and the manufacturability, including encapsulation, alignment, registration, and drilling. In the case of adhesion of the polymer to the underlying metal, the tear strength between pyromellitic dianhydride oxydianiline (PMDA-ODA) and a chromium coated, 0.002 inch thick, Copper/Invar/Copper substrate is on the order of 1 to 2 grams per millimeter. The failure site is at the polyimide - chromium interface.
Various approaches have been used to improve the adhesion of polymers, as polyimides, to metals, as copper. For example, U.S. Pat. No. 4,902,551 to Yuko Kimura, Akishi Nakaso, Haruo Ogino, Toshiro Okamura, and Tomoko Watanabe (assignors to Hitachi Chemical Co., Ltd) recognizes the existence of a copper oxide layer on the copper, and first forms the copper oxide layer in a alkaline solution and thereafter electrolytically removes the copper oxide layer to enhance the adhesion of the polymer to the copper.
In U.S. Pat. No. 3,958,317 of Leland L. Peart and John S. Schiavo, assigned to Rockwell International, a copper chromium laminate is described, with an epoxy resin bonded thereto. In order to promote the adhesion of the epoxy resin, the chromium is partially etched. It is stated that the roughened, cracked chromium surface improved the adhesion of the epoxy thereto.
In U.S. Pat. No. 3,853,961 to E. Caule, assigned to Olin, plastic is laminated to copper to provide a tarnish free coating. The copper substrate is oxidized to form an oxide film, and then reacted with a phosphate to form a glassy, copper phosphate coating. The polymer is laminated to this coating.
In U.S. Pat. Nos. 4,524,089 and 4,588,641 of R. Haque and E. F. Smith (assigned to Olin Corp.) there is described a method of coating a a polymeric film onto a copper substrate. This is a multi-step, multi-plasma process. As described in Haque et al., the substrate is exposed to an oxygen plasma, then to a hydrocarbon monomer gas plasma, and finally to another oxygen plasma.
In U.S. Pat. No. 4,416,725 to J. J.. Cuomo, P. A. Leary, and D. S, Yee (assigned to International Business Machines Corp.) there is described a method of coating a copper surface by placing it in a chamber, charging the chamber with iodine vapor, and forming an iodine plasma to form a copper iodide film. The copper iodide film is then textured. This is reported to improve the adhesion of coatings, as polyimide, polyester, and polymethyl methacrylate, to the copper.
Other techniques to improve the adhesion of polyimide to copper, as the copper surface of a Cu/Invar/Cu body, include applying a thin film, metallic adhesion layer, as a thin film adhesion layer of chromium, to the copper. Still other techniques include treatment with oxygen containing or forming plasmas, stress relief, and chemical pre-treatments. Notwithstanding these expedients, metal-polyimide adhesion values of only 1-2 grams/millimeter were obtained.
The adhesion of the dielectric polymer to the underlying metal core and the manufacturability of the resulting layer must enhance the subsequent processing of the composite. Subsequent processing of metal core packages includes circuitization, that is, the formation of a Cu signal pattern or power pattern on the polymeric encapsulant, the lamination of the layers to form a multilayer package, and the attachment of chips to the package.
Circuitization may be additive or subtractive. Subtractive circuitization is described, for example in Gerald W. Jones, Jane M. Shaw, and Donald E. Barr, Lithography In Electronic Circuit Packaging, in Chapter 12 of Seraphim et al., Principles of Electronic Packaging, pages 372-423. As described therein, copper is applied to the substrate. This copper generally has a thickness of about 1.4 mils (one ounce per square foot). Thereafter a resist is placed on the copper coated printed circuit board substrate to define the printed circuit on circuitization. After, e.g., exposure and development, the resist covers the copper in areas that are to become circuit traces, and leaves the rest of the copper exposed.
The board, with patterned resist atop the copper, is passed through an etching chamber containing copper etchants. These etchants convert the copper to water soluble copper compounds and complexes which are removed by spray action.
The copper that was underneath the resist is not attacked by the etchants. After etching the resist is stripped, that is, chemically debonded and mechanically removed, leaving behind copper in the form of the desired circuit traces.
The composite printed circuit package is fabricated by interleaving cores (that is, metal core packages, including signal cores, signal/signal cores, power cores, power/power cores, and signal/power cores) with additional metal core layers, and surface circuitization. Holes, as vias and through holes, are drilled in individual core structures before circuitization.
One problem that has been observed with the manufacture of the above described metal core packages is the high temperature lamination of the polymeric dielectric to the metal core. Another problem is the accurate alignment of the laser drilled and/or mechanically punched holes with the vias and through holes previously drilled or punched in the metal foil core. A third problem is the laser processability of some polymeric dielectrics.
Attempts to remedy these problems have involved the application and curing of conformal coatings of the polymeric dielectrics to the metal foil core material, as described, for example, in U.S. Pat. No. 3,934,334 to Stephen L. Hanni for METHOD OF FABRICATING METAL PRINTED WIRING BOARDS, U.S. Pat. No. 4,188,415 to Hiroshi Takahashi, Kiyoshi Nakao, and Maasaki Katagiri for BASEBOARD FOR PRINTED CIRCUIT BOARD AND METHOD OF PRODUCING THE SAME, U.S. Pat. No. 4,254,172 to Hiroshi Takahashi, Kiyoshi Nakao, and Maasaki Katagiri for BASEBOARD FOR PRINTED CIRCUIT BOARD, U.S. Pat. No. 4,303,715 to Joseph J. Chang for PRINTED WIRING BOARD, and U.S. Pat. No. 4,783,247 to Markus Seibel for METHOD AND MANUFACTURE FOR ELECTRICALLY INSULATING BASE MATERIAL USED IN PLATED THROUGH HOLE PRINTED CIRCUIT PANELS.
U.S. Pat. No. 4,188,415 to Hiroshi Takahashi, Kiyoshi Nakao, and Maasaki Katagiri for BASEBOARD FOR PRINTED CIRCUIT BOARD AND METHOD OF PRODUCING THE SAME, and U.S. Pat. No. 4,254,172 to Hiroshi Takahashi, Kiyoshi Nakao, and Maasaki Katagiri for BASEBOARD FOR PRINTED CIRCUIT BOARD apply the dielectric by dip coating. In the disclosed process the viscosity of the uncured dielectric coating material is controlled to obtain conformal coating.
U.S. Pat. No. 4,303,715 to Joseph J. Chang for PRINTED WIRING BOARD, and U.S. Pat. No. 4,783,247 to Markus Seibel for METHOD AND MANUFACTURE FOR ELECTRICALLY INSULATING BASE MATERIAL USED IN PLATED THROUGH HOLE PRINTED CIRCUIT PANELS seek to obtain conformal coating on perforated foil cores with electrostatic coating followed by successive passes with techniques complimentary to dipping.